Implementation of SVM to improve the performance of a nine level inverter with reduced number of switches
Recently multilevel inverters (MLIs) got wide popularity as it gives much similarity in the output voltage waveform of that of ideal inverter. Many topologies are existed for MLIs. A new topology that gives better performance in reduction of switch count is also there in the field of MLIs. This new topology uses Sinusoidal Pulse Width Modulation (SPWM) as the control strategy.
Even though it gives better results over the other existing topologies, it suffers some problems especially in the case of THD (Total Harmonic Distortion). For the nine level inverter, new topology gives harmonics content that is much larger than tolerance limit, which is specified by IEEE standards, for industrial application. This paper presents the performance characteristics of new topology with SVM (Space Vector Modulation) usingMATLAB Simulink platform. Simulation results show that THD can be reduced to the level that is admissible for both domestic and industrial applications.