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Low power CMOS comparator using bipolar CMOS technology for signal processing applications

The building block in analog to digital converters (ADC) is comparator. To increase speed and power efficiency, low power comparators are required by the high speed ADCs. When the supply voltages are smaller, high speed comparators are more challenging to design.

To compensate the design challenges, methods such as supply boosting techniques, techniques employing body-driven transistors, current-mode design and dual oxide processes, which are capable of handling larger supply voltages, have been developed. The conventional comparator with double tail design is modified in circuit level using Bipolar CMOS technology for low power with proper delay.